Class Code 4112
Integrated Circuit And Semiconductor Wafer Mfg
Class Code 4112 covers integrated circuit and semiconductor wafer manufacturing operations in California, including cleanroom wafer fabrication and supporting equipment maintenance. The approved pure premium rate for Sept 1, 2026 is $0.334 per $100 of payroll — a benchmark employers use to estimate workers' comp costs for fabs and IC shops.
What Class Code 4112 Covers
This classification applies to operations that manufacture semiconductor wafers and integrated circuits: wafer fabrication (lithography, diffusion, etch, deposition, ion implantation, CMP), process tool operation and maintenance, metrology, and statistical process control performed in controlled cleanroom environments. It also covers in‑fab test and probe stations, burn‑in and reliability testing when performed on site, and routine equipment repair and calibration that occurs inside fab areas. Back‑end assembly/packaging layers that are performed on the same payroll may be included when they are part of an integrated IC manufacturing operation, while purely separate packaging/test shops can be classified differently. The code is specific to employees on the employer payroll; third‑party contractors with their own workers' comp should typically be insured separately.
Who It Applies To
- Wafer fab operators and cleanroom technicians
- Process and equipment engineers working inside fabrication areas
- Maintenance and calibration technicians servicing fab tools
- Metrology and test technicians (probe, burn‑in, reliability)
- Fab safety, EHS, and chemical handling personnel
Common Job Duties
- Operating and monitoring photolithography, etch, deposition, and diffusion equipment in cleanrooms
- Handling and transporting wafers and substrates using automated tools and wafer carriers
- Performing preventive maintenance, repairs, alignment, and calibration on high‑voltage, vacuum and gas‑delivery equipment
- Mixing, storing, and dispensing specialty chemicals, solvents and photoresists under controlled procedures
- Conducting metrology, inspection, electrical testing, and data collection for process control
- Setting up and running burn‑in and reliability tests on packaged devices and die
Common Injury Risks
Understanding the $0.334 Rate
The pure premium rate of $0.334 per $100 of payroll represents the expected cost of indemnity and medical losses before insurer overhead and profit. To estimate premium multiply your payroll for employees in code 4112 by 0.00334 (for example, $100,000 payroll x 0.00334 = $334 pure premium). Final premium is adjusted by your insurer using experience modification, policy-class level debits/credits, premium discounts, and any deductible or retrospective rating plan.
Cal/OSHA Compliance Requirements
Cal/OSHA requirements commonly applicable include comprehensive Hazard Communication and chemical right‑to‑know programs, respiratory protection and fit testing where airborne exposures exist, and Process Safety Management controls for highly hazardous chemicals. Employers must also follow lockout/tagout procedures for equipment maintenance, confined space entry rules for enclosed process vessels, and electrical safety standards for high‑voltage tools; regular training, exposure monitoring, and documented written programs are essential.
How Key HR Helps Employers Under Class Code 4112
A PEO like Key HR helps semiconductor employers by ensuring correct classification of employees under 4112, centralizing payroll and claims reporting, and providing targeted loss‑prevention programs (chemical handling, gas monitoring, respirator and electric safety). Key HR can also coordinate return‑to‑work and light‑duty plans, perform safety audits specific to fabs, and leverage group purchasing and claims management to help control workers' comp costs.
Get a QuoteFrequently Asked Questions
Do cleanroom wafer handlers and back‑end packaging workers both fall under 4112?
Cleanroom wafer fabrication and on‑site IC test operations are squarely within 4112. Back‑end assembly and packaging done on the same payroll may be included if part of an integrated IC manufacturing process; however, standalone packaging/test facilities or contract packagers are often assigned different class codes. Have your payroll and operations audited to confirm correct classification.
What practical steps reduce workers' comp costs for a fab?
Key steps include enforcing chemical safety procedures, instituting respirator and gas‑monitoring programs, preventive maintenance and lockout/tagout for tools, ergonomic controls for wafer handling, strong return‑to‑work protocols, and proactive claims management. Training and documentation that demonstrate reduced exposure and quick medical response can lower experience modification and premiums over time.
Are contract technicians working inside a fab covered under my 4112 policy?
Independent contractors who carry their own workers' comp insurance should not be on your payroll classification. If the technicians are on your payroll, they must be classified under 4112 if performing covered fab work. Always verify certificates of insurance for contractors and document scope of work to avoid misclassification and coverage gaps.
Quick Facts
- Class Code
- 4112
- Classification
- Integrated Circuit And Semiconductor Wafer Mfg
- Pure Premium Rate
- $0.334 / $100 payroll
- Effective Date
- September 1, 2026
- Source
- WCIRB Approved Filing
Manage Workers' Comp Through a PEO
Key HR provides pay-as-you-go workers' comp for California employers — no large deposits, no audits, better rates.
Get a Quoteor call (800) 922-4133Ready to Simplify Workers' Comp for Class Code 4112?
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